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22 - 26 Feb 2021Ended

Design-Technology Co-optimization Conference

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Timings

09:00 AM - 06:00 PM
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Estimated Turnout

upto 100
Delegates
Based on previous editions

Editions

Feb 2021

Frequency

Not Available
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The semiconductor industry is rapidly evolving in multiple directions. Products are being introduced into diverse automotive, medical, avionics, and .. Read more space applications. Chips are becoming more complex due to increasing content and functionality and diverse digital, analog, and mixed-signal circuitry. Technologies are being aggressively scaled to ever-shrinking dimensions and are utilizing novel materials and device architectures to keep pace with Moore’s Law, resulting in tighter coupling of and interaction among technology, design, and product challenges. These trends converge to bring increased performance, reliability, and quality challenges and more stringent requirements for such products and applications. In order to address these challenges and deliver to the requirements, chip designers and manufacturers must collaboratively optimize the design, process technology, and testing of the chips. This talk will explore selected techniques and trade-offs that must be developed and utilized to meet performance, reliability, and quality requirements.

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Spie- International Society For Optical EngineeringRenowned

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